Xilinx Spartan-6 SP601
Xilinx Spartan-6 SP601
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1 Spartan-6 FPGA XC6SLX16-2CSG324
2 DDR2 Component Hard memory controller w/ OCT
3 SPI x4 Flash and Headers SPI select and External Headers
4 Linear Flash BPI StrataFlash 8-bit (J3 device), 3 pins
shared w/ SPI x4
5 10/100/1000 Ethernet PHY GMII Marvell Alaska PHY
6 RS232 UART (USB Bridge) Uses CP2103 Serial-to-USB connection
7 IIC Goes to Header and VITA 57.1 FMC
8 Clock, socket, SMA Differential, Single-Ended, Differential
9 VITA 57.1 FMC-LPC connector LVDS signals, clocks, PRSNT
10 LEDs Ethernet PHY Status
11 LED, Header FPGA Awake LED, Suspend Header
12 LEDs FPGA INIT, DONE
13 LED User IO DIP Switch User IO Push-Button User IO, CPU_RESET
12-pin (8 I/O) Header 6 pins x 2 male header w/ 8 IOs
14 Push-Button FPGA_PROG_B
15 USB JTAG Cypress USB to JTAG download cable logic
16 Onboard Power Power Management
What's Included
SP601 Base Board including the XC6SLX16-CS324-2CES FPGA
FPGA Design Software
A DVD of Xilinx ISE Design Suite: WebPack Edition is included in the kit.
Targeted Reference Designs
Base Reference Design
Hard Memory Controller Design
MultiBoot Configuration Design
Getting Started Demonstration
documentation
Hardware Setup Guide
Getting Started Guide
Hardware User Guide
Reference Design User Guide
Board Design Files – Schematics / Gerbers / BOM
Cables & Power Supply
5 volt Universal Power Adapter
2 USB A/MiniB Cables (For Download & Debug)
Ethernet Cable
Key Features
FPGA: XC6SLX16 CS324-2CES Spartan-6
Configuration:
Onboard configuration circuitry
Quad SPI Flash 64MB
16MB Parallel (BPI) Flash
JTAG
Memory:
DDR2 Component Memory 128MB
IIC 8Kb IIC EEPROM
Communication:
10/100/1000 Tri-Speed Ethernet PHY
Serial (UART) to USB Bridge
Expansion Connectors:
FMC-LPC connector (68 single-ended or 34 differential user defined signals)
8 User I/O (Digilent 2x6 Header)
Clocking:
200MHz Oscillator (Differential)
Socket (Single-Ended) Populated with 27MHz Osc
SMA Connectors (Differential)
Display:
4X LEDs
Control:
4X Push Buttons
4X DIP Switches
2 DDR2 Component Hard memory controller w/ OCT
3 SPI x4 Flash and Headers SPI select and External Headers
4 Linear Flash BPI StrataFlash 8-bit (J3 device), 3 pins
shared w/ SPI x4
5 10/100/1000 Ethernet PHY GMII Marvell Alaska PHY
6 RS232 UART (USB Bridge) Uses CP2103 Serial-to-USB connection
7 IIC Goes to Header and VITA 57.1 FMC
8 Clock, socket, SMA Differential, Single-Ended, Differential
9 VITA 57.1 FMC-LPC connector LVDS signals, clocks, PRSNT
10 LEDs Ethernet PHY Status
11 LED, Header FPGA Awake LED, Suspend Header
12 LEDs FPGA INIT, DONE
13 LED User IO DIP Switch User IO Push-Button User IO, CPU_RESET
12-pin (8 I/O) Header 6 pins x 2 male header w/ 8 IOs
14 Push-Button FPGA_PROG_B
15 USB JTAG Cypress USB to JTAG download cable logic
16 Onboard Power Power Management
What's Included
SP601 Base Board including the XC6SLX16-CS324-2CES FPGA
FPGA Design Software
A DVD of Xilinx ISE Design Suite: WebPack Edition is included in the kit.
Targeted Reference Designs
Base Reference Design
Hard Memory Controller Design
MultiBoot Configuration Design
Getting Started Demonstration
documentation
Hardware Setup Guide
Getting Started Guide
Hardware User Guide
Reference Design User Guide
Board Design Files – Schematics / Gerbers / BOM
Cables & Power Supply
5 volt Universal Power Adapter
2 USB A/MiniB Cables (For Download & Debug)
Ethernet Cable
Key Features
FPGA: XC6SLX16 CS324-2CES Spartan-6
Configuration:
Onboard configuration circuitry
Quad SPI Flash 64MB
16MB Parallel (BPI) Flash
JTAG
Memory:
DDR2 Component Memory 128MB
IIC 8Kb IIC EEPROM
Communication:
10/100/1000 Tri-Speed Ethernet PHY
Serial (UART) to USB Bridge
Expansion Connectors:
FMC-LPC connector (68 single-ended or 34 differential user defined signals)
8 User I/O (Digilent 2x6 Header)
Clocking:
200MHz Oscillator (Differential)
Socket (Single-Ended) Populated with 27MHz Osc
SMA Connectors (Differential)
Display:
4X LEDs
Control:
4X Push Buttons
4X DIP Switches